|
|
Article: Samsung Electronics Develops Wafer Level Package for Higher Chip Performance; 512Mb DDR2 WLP Supports JEDEC CSP Ball Specifications.
- Article from:
- Business Wire
- Article date:
- June 17, 2004
CopyrightCOPYRIGHT 2004 Business Wire. This material is published under license from the publisher through the Gale Group, Farmington Hills, Michigan. All inquiries regarding rights should be directed to the Gale Group. (Hide copyright information)
|
SEOUL, South Korea -- Samsung Electronics Co., Ltd., the world leader in advanced semiconductor memory technology, today announced the industry's first wafer level package (WLP) for high-performance 512Megabit (Mb) DDR2 SDRAMs. WLP, unlike conventional package technology, builds the package layer directly on the wafer by incorporating fabrication process. This new approach enhances the electrical properties and reduces the physical space making WLP an optimal package solution for mobile environments and high-density memory modules.
The new package technology, WLC, is originated from the wafer level process. Two patterned inter-layer dielectrics (ILD), with ...