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Article: WLP--promises and pitfalls.(Industry Commentary)(Wafer-level packaging)
- Article from:
- Semiconductor International
- Article date:
- October 1, 2004
- Author:
CopyrightCOPYRIGHT 2004 Reed Business Information. This material is published under license from the publisher through the Gale Group, Farmington Hills, Michigan. All inquiries regarding rights should be directed to the Gale Group. (Hide copyright information)
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Wafer-level packaging (WLP) has captured and held the imagination of the IC packaging community for more than a decade. Most WLP developers appear to have drawn inspiration from redistribution wired flip-chip technology used in IBM's famed C4 process and dating back to the 1960s. One notable exception was MPulse (later ChipScale Inc.), where leads were moved to the periphery and wrapped around the edges of the die by some clever processing methods in the 1991 time frame. Since then, there have been numerous variations on the general theme coming from national, corporate and university laboratories around the globe. A search of the U.S. Patent Office records using the term ...