Article: Tokyo Electron Device Announces ASIC/LSI Prototyping Board Released Featuring DDR3 SDRAM and LV-DDR2 SDRAM.

A Complete Development Platform to Interface with Next-Generation Memories Using Xilinx Virtex[R]-5

YOKOHAMA, Japan -- Tokyo Electron Device Limited (TED)(TOKYO:2760) has today announced the release of Virtex-5 DDR3/LV-DDR2 SDRAM evaluation platform featuring next-generation high-speed DDR3 SDRAM memory and new LV-DDR2 SDRAM from Elpida Memory.

The inrevium* TB-5V-LX110-DDR3 is ideally suited for ASIC/LSI prototyping that can be used to test DDR3 SDRAM with a maximum speed of 1,066Mbps and LV-DDR2 SDRAM with a maximum speed of 667Mbps. This is the first FPGA evaluation platform to incorporate a DDR3 SODIMM (small outline dual in-line memory module) ...






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