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Article: United States: CoWare Releases Interconnect and Memory Subsystem Performance Optimization Design Flow.
- Article from:
- TendersInfo
- Article date:
- June 20, 2009
CopyrightCOPYRIGHT 2009 Al Bawaba (Middle East) Ltd. This material is published under license from the publisher through the Gale Group, Farmington Hills, Michigan. All inquiries regarding rights should be directed to the Gale Group. (Hide copyright information)
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Byline: prashant03
CoWare, a supplier of Electronic System Virtualization software and services, announced the availability of a new Interconnect and Memory Subsystem Performance Optimization design flow for CoWare Platform Architect, which the company said will enable early and efficient optimization of next-generation system-on-chip (SoC) architectures using ARM AMBA-based virtual platforms.
CoWare virtual platforms for architecture design are the virtualized representation of an electronic system used for the purpose of system-level performance analysis and architecture optimization. The new flow provides system architects with the ability to ...