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Article: Research from Tohoku University provides new data about electron devices.
- Article from:
- Electronics Newsweekly
- Article date:
- November 18, 2009
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"An optimum design theory to clarify a possible limit of achieving both high conversion gain (CG) and full well capacity (FWC) at the same time in a CMOS image sensor with a lateral overflow integration capacitor (LOFIC) in a pixel is discussed," researchers in Sendai, Japan report.
"The possible limit of both high CG and high FWC is theoretically derived from a signal-to-noise-ratio (SNR) formula at a switching point from a low light signal (S1) to a bright one (S2). Based on this theory, a 1/4-in VGA-format 5.6-mu m-pixel-pitch CMOS image sensor has been fabricated through a 0.18-mu m 2P3M CMOS technology," wrote N. Akahane and colleagues, Tohoku University.
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