Article: Tessera Technologies Introduces Packaging Solution Offering Significant Cost, Weight and Density Benefits for DDR Applications.

Business Editors/High-Tech Writers

SAN JOSE, Calif.--(BUSINESS WIRE)--Dec. 5, 2001

Chip-scale Technology Demonstrated at SEMICON Japan Offers Alternative

to Stacked TSOPs Used in Servers, Workstations and Mobile Computing

Tessera Technologies Inc., a leading provider of intellectual property for chip-scale packaging (CSP), today introduced an advanced semiconductor packaging solution that allows OEMs and memory module manufacturers to maximize the density of their memory boards. Tessera will be demonstrating the solution from December 5-7 in booth A504 at SEMICON Japan, located in Hall 11 of the Makuhari Messe, Nippon Convention ...

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