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Article: OFFIS/OSC Announces New Version of First Tool for Optimizing Chip Power Consumption at the Highest Level of Abstraction.
- Article from:
- Business Wire
- Article date:
- March 4, 2002
CopyrightCOPYRIGHT 2002 Business Wire. This material is published under license from the publisher through the Gale Group, Farmington Hills, Michigan. All inquiries regarding rights should be directed to the Gale Group. (Hide copyright information)
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Business Editors/High-Tech Writers
OLDENBURG, Germany--(BUSINESS WIRE)--March 4, 2002
ORINOCO(R) 2002.1 Now Features Interconnect and Controller Power
Estimation from C/C++ Specifications and Improved Accuracy
OFFIS Systems and Consulting GMBH (OSC), today announced a new version of ORINOCO(R), the industry's only design tool for optimizing chip power consumption at the specification level, offering up to 75% power reduction and decreasing design cycle time from weeks to minutes over Register Transfer Level (RTL). Developed out of several research projects by the embedded systems division of OFFIS, ORINOCO(R) 2002 allows efficient ...