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Article: CAE tools lay the foundation for a methodology makeover. (computer-aided engineering design tools)
- Article from:
- EDN
- Article date:
- July 19, 1990
- Author:
CopyrightCOPYRIGHT 1990 Reed Business Information, Inc. (US). This material is published under license from the publisher through the Gale Group, Farmington Hills, Michigan. All inquiries regarding rights should be directed to the Gale Group. (Hide copyright information)
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AT LAST YEAR'S DESIGN AUTOMATION CONFERENCE in Las Vegas, NV, vendors claimed, "We speak VHDL." The vendors may have spoken VHDL (VHSIC Hardware Description Language), but generally, their CAE tools didn't. One year later, the tools that are available are better able to speak the language. However, there are still inflated promises and vaporware. VHDL will have relatively little impact in system or ASIC design methodology in the short term. However, the progress the tools are making now is laying the groundwork for sweeping changes.
These changes won't happen tomorrow. But they will occur because designers, system architects, and engineering managers are ...