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Article: PMC-Sierra introduces OC-48/STM-16 and OC-192/STM-64 chip set. (New Products).(Brief Article)
- Article from:
- Fiber Optics Weekly Update
- Article date:
- June 7, 2002
CopyrightCOPYRIGHT 2002 Information Gatekeepers, Inc. This material is published under license from the publisher through the Gale Group, Farmington Hills, Michigan. All inquiries regarding rights should be directed to the Gale Group. (Hide copyright information)
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PMC-Sierra announced the CHESS-III chip set for aggregating, grooming, and transporting 2.5Gbps and 10Gbps metro services. The chip set establishes a new benchmark for technology and innovation. CHESS-ill simplifies design and network management and substantially reduces carrier systems costs. The chip set enables original equipment manufacturers (OEMs) to leverage deployed line cards into new and more advanced systems, thereby preserving existing service provider investment and infrastructure. The CHESS-III chip set includes the PM5376 TSENxl6O STS-1/AU-3 cross-connect device, PM5326 ARROW-2x192, and PM5 324 ARROW-1x192 SONET/SDH framers. CHESS-HI is ideal for ...
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Article: PMC-Sierra Announces Production Release of CHESS III and ...
Business Wire;
June 6, 2005 ;
700+ words
... ... into every network element CHESS III chip set for aggregating, grooming ... I/O (RASIO(TM)) The CHESS III chip set consists of the following devices ... port of OC-192/STM-64 CHESS Wideband chip set for VT/TU grooming The CHESS ...
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