Article: California Inventors Develop Double Data Rate Embedded Memory Implementation System

ALEXANDRIA, Va., Dec. 13 -- Philip Pan of Fremont, Calif., and Andy L. Lee of San Jose, Calif., have developed a method for implementating double data rate embedded memory.

The patent has been assigned to Altera Corp., San Jose.

According to the abstract released by the U.S. Patent & Trademark Office: "A memory block of a programmable device uses a double data rate communication scheme to communicate data with logic cells at a rate of two bits per clock cycle per data line. The memory block can be configured to use the double data rate communication scheme or a single data rate communication scheme. The memory block can switch between either communications scheme as needed to ...

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